Many innovative non-volatile memory NVM applications and concepts, e.g. magnetoresistive random access memory MRAM, e.g. resistive random access memory RRAM, e.g. conductive-bridge random access memory CBRAM, e.g. phase change memory PCRAM suffer from a very small read current window in comparison to classical floating gate FLASH cells. Over the lifetime of the memory cell, the memory cell may suffer from an unstable read current window, especially when typically large distribution widths in larger cell fields are considered. Up till now, attempts have been made to make small read windows usable, for example, through a variable reference, through the use of stronger error-correcting codes ECC, complex program algorithms, and through restrictions to specifications such as temperature and cycle numbers. The error rates of the memory are unfortunately so high that they have not been considered for more advanced or complex applications.
Spin-Transfer-Torque magnetic random access memory STT-MRAM cells, for example, have a low resistance difference between the erased and the written state, typically having a 100% resistance change, e.g. 2 k Ohm vs. 4 k Ohm. To distinguish the levels during the reading, the reference current for the sense amplifier must be located exactly between the two levels, i.e. exactly between the erased and written state. A challenge faced in STT-MRAM arrays is that while normally a combination of erased and programmed reference cells may be used to generate the reference current, which may help to read the state of the selected cell, they may fail if the current distributions of the full memory are wide or close together.